SCI-SSCI or SCI Expanded Articles

• B Demir, S Ulukaya and O Erdem "Detection of Parkinson’s disease with keystroke data" Computer Methods in Biomechanics and Biomedical Engineering, 1-15, Doi: 10.1080/10255842.2023.2245516 (August 2023)

• O Erdem, T Soylu and A Carus "Pipelined Decision Trees for Online Traffic Classification on FPGAs" The Computer Journal, Doi: 10.1093/comjnl/bxad022 (February 2023)

• S Ulukaya, A.A Sarıca, O Erdem and A Karaali " MSCCov19Net: multi-branch deep learning model for COVID-19 detection from cough sounds" Medical & Biological Engineering & Computing, 1-11, Doi: 10.1007/s11517-023-02803-4 (January 2023)

• T.Soylu, O. Erdem and A.Carus "Bit vector-coded simple CART structure for low latency traffic classification on FPGAs" Elsevier Computer Networks, 167, 106977, Doi:10.1016/j.comnet.2019.106977 (August 2020)

• O. Erdem “Pipelined Hierarchical Architecture for High Performance Packet Classiffication” Elsevier Computer Networks vol.103, pp.143-164, April 2016. DOI: 10.1016/j.comnet.2016.04.009 (April 2016)

• O. Erdem “Tree-based string pattern matching on FPGAs” Elsevier Computers & Electrical Engineering vol.49, pp.117-133, January 2016. DOI: 10.1016/j.compeleceng.2015.11.025 (January 2016)

• O. Erdem and A.Carus “Multi-Pipelined and Memory-Efficient Packet Classification Engines on FPGAs” Elsevier Computer Communications vol.67, pp.75-91, August 2015. DOI: 10.1016/j.comcom.2015.05.017 (August 2015)

• O. Erdem, A.Carus and H.Le “Value-Coded Trie Structure for High Performance IPv6 Lookup” The Computer Journal vol.58, no.2, pp.204-214, February 2015. (February 2015)

• O. Erdem, A.Carus and H.Le “Large-scale SRAM-based IP lookup architectures using compact trie search structures” Elsevier Computers & Electrical Engineering, vol.40, no.4, pp.1186-1198, May 2014. (May 2014)

• O. Erdem, and C.F. Bazlamaçcı, “High Performance IP Lookup Engine with Compact Clustered Trie Search” IEEE The Computer Journal vol. 55, no.12, pp. 1447-1466, August 2012. (August 2012)

• O. Erdem and C.F. Bazlamaçcı, “Array design for trie-based IP Lookup” IEEE Communications Letters, vol.14, no.8, pp.773-775, August 2010. (August 2010)

International Conference Proceedings

• H Karagöl, B Akbas, O Erdem and T Soylu "Darknet traffic classification with machine learning algorithms and SMOTE method" 2022 7th International Conference on Computer Science and Engineering (UBMK 2022), Diyarbakir, Turkey ,2022 (September 2022)

• İ Kurt, S Ulukaya and O Erdem "Classification of Parkinson’s disease using dynamic time warping" 2019 27th Telecommunications Forum (TELFOR), 1-4, Belgrade, Serbia, 2019 (November 2019)

• İ. Kurt, S. Ulukaya, O. Erdem, "Musical Feature Based Classification of Parkinson's Disease Using Dysphonic Speech", 41st International Conference on Telecommunications and Signal Processing (TSP 2018), Athens, Greece, 2018 (July 2018)

• T.Soylu, O. Erdem, A. Carus, E.S.Güner , ”Real-Time Traffic Classification using Simple CART Forest on FPGAs” , 2018, 19th IEEE International Conference on High Performance Switching and Routing (HPSR) 17-20 June 2018 – Bucharest, Romania (June 2018)

• T.Soylu, O. Erdem, A. Carus, E.S.Güner , ”Simple CART Based Real-Time Traffic Classification Engine on FPGAs ” 2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig'17) ,December 2017, Cancun, Mexico. (December 2017)

• N.T.Kucun, O.Erdem and Y. Yoruk , ”Women Entrepreneurship in Research and Development ” 2014 International Women and Business Conference, pp.24,October 2014, Belgrade, Serbia. (October 2014)

• O. Erdem and A. Carus , ”Range Tree-Linked List Hierarchical Search Structure for Packet Classification on FPGAs ” 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig'13), pp.1-6,December 2013, Cancun, Mexico. (December 2013)

• O. Erdem and A. Carus "Clustered Linked List Forest for IPv6 Lookup" 21st Annual Symposium on High-Performance Interconnects (HOTI 2013), pp.33-40, August 2013, Cisco Headquarters, San Jose, San Francisco, CA, USA (August 2013)

• O. Erdem, A. Carus and H. Le, ”Compact Trie Forest: Scalable architecture for IP Lookup on FPGAs ” 2012 International Conference on Reconfigurable Computing and FPGAs (ReConFig'12), pp.1-6,December 2012, Cancun, Mexico. (December 2012)

• O. Erdem, H. Le and V. K. Prasanna, ”Hierarchical hybrid search structure for high performance packet classification”31st Annual Joint Conference of the IEEE Computer and Communications Societies(INFOCOM’12), pp.1898-1906,March 2012, Orlando, Florida, USA. (March 2012)

• Y.H. E. Yang, O. Erdem and V. K. Prasanna, " Scalable Architecture for 135 Gbps IPv6 Lookup on FPGA" 19th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’12), pp.272-272, February 2012, Monterey, California, USA. (February 2012)

• O. Erdem, H. Le, V. K. Prasanna and C.F. Bazlamaçcı, "Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs," In Proc. of the 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP’11), pp.95-102, September 2011, Santa Monica, California, USA. (September 2011)

• O. Erdem, H. Le, and V. K. Prasanna, "Clustered Hierarchical Search Structure for Large-Scale Packet Classification on FPGA" In Proc. of the 21st International Conference on Field Programmable Logic and Applications (FPL’11), pp.201-206, September 2011,Chania, Crete, Greece. (September 2011)

• Y.H. E. Yang., O. Erdem and V. K. Prasanna, "High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search" In Proc. of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’11), pp.77-80, May 2011,Salt Lake City, Utah, USA. (May 2011)

• O. Erdem, H. Le, V. K. Prasanna and C.F. Bazlamaçcı, "Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs" In Proc. of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM’11), pp.253, May 2011,Salt Lake City, Utah, USA. (May 2011)

• O. Erdem and C.F. Bazlamaçcı, “MIPS extension for a TCAM based parallel architecture for fast IP lookup” In Proc. of the 24th International Symposium on Computer and Information Sciences (ISCIS'09), pp. 310-315, September 2009, Guzelyurt, Cyprus. (September 2009)

National Conference Proceedings

• O. Erdem and C.F. Bazlamaçcı, “SRAM based systolic array architecture for fast IP lookup” In Proc. of the 13th Nat. Conference Electrical, Electronics, Computer and Biomedical Engineering Conference, December 2009. (December 2009)

Doctoral Dissertations Advised

• "Designing a new FPGA-based Real-Time Traffic Classification Engine Using Machine Learning Techniques", Tuncay SOYLU, Computational Science, Trakya University (August 2018) (August 2018)

Master`s Theses Advised

• "Detection of parkinson's disease with finger tapping data using machine learning techniques" Bahar DEMİR, Computational Science, Trakya Üniversity (January 2022) (January 2022)

• "Preliminary detection of Parkinson's disease using machine learning techniques and gait data" Sinem Ayna ALTUNTAŞ, Computational Science, Trakya University (January 2022) (January 2022)

• "Detection of Parkinson's Disease with Musical Features Using Machine Learning Methods", Ilke KURT, Computational Science, Trakya University (December 2018) (December 2018)

• (Co-supervisor) "TRIE-TREE DATA STRUCTURE FOR IP LOOKUP IN VIRTUAL ROUTERS" Dilek Baysal, Electrical and Electronics Engineering, Middle East Technical University (January 2014)

• (Co-supervisor) "MEMORY ORGANIZATION IN PIPELINED HIERARCHICAL SEARCH STRUCTURES FOR PACKET CLASSIFICATION" Cağla Irmak Rumelili, Electrical and Electronics Engineering, Middle East Technical University (June 2013)

Projects

• Early Detection of Parkinson's Disease with Machine Learning Techniques Using Multimodal Signals (August 2021)

Awards

• Best Doctorate Thesis of 2011 in METU (April 2011)

Other

• Bazlamaçcı, C.F. and Erdem, O. “Systolic array architecture for fast IP lookup”, US Patent No: US 8,724624 B, Date of patent: May 13, 2014 (May 2014) usa patent p3.jpg

• Bazlamaçcı, C.F. and Erdem, O. “Systolic array architecture for fast IP lookup”, Japanese Patent No: 5529976, Date of patent: April 25, 2014 (April 2014) japan patent p2.jpg

• Bazlamaçcı, C.F. and Erdem, O. “Systolic array architecture for fast IP lookup”, European Patent No: EP2517420B1, Date of patent: March 19, 2014 (March 2014) EP2517420B1.pdf

Computer Architecture

Computer Networks

High Speed Computer Networking

Logic Circuits

Microprocessors